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| IN74HCT20 DUAL 4-INPUT NAND GATE High-Performance Silicon-Gate CMOS The IN74HCT20 is identical in pinout to the LS/ALS20. The IN74HCT20 may be used as a level converter for interfacing TTL or NMOS outputs to High-Speed CMOS inputs. * TTL/NMOS-Compatible Input Levels Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 4.5 to 5.5 V Low Input Current: 1.0 A High Noise Immunity Characteristic of CMOS Devices * * * * ORDERING INFORMATION IN74HCT20N Plastic IN74HCT20D SOIC TA = -55 to 125 C for all packages LOGIC DIAGRAM PIN ASSIGNMENT PIN 14 =VCC PIN 7 = GND PINS 3,11 = NO CONNECTION NC = NO CONNECTION FUNCTION TABLE Inputs Output A B C D Y L X X X H X L X X H X X L X H X X X L H H H H H L X = don't care 1 IN74HCT20 MAXIMUM RATINGS* Symbol Parameter Value Unit VCC DC Supply Voltage (Referenced to GND) -0.5 to +7.0 V VIN DC Input Voltage (Referenced to GND) -1.5 to VCC +1.5 V VOUT DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V IIN DC Input Current, per Pin mA 20 IOUT DC Output Current, per Pin mA 25 ICC DC Supply Current, VCC and GND Pins mA 50 PD Power Dissipation in Still Air, Plastic DIP+ 750 mW SOIC Package+ 500 Tstg Storage Temperature -65 to +150 C 260 TL Lead Temperature, 1 mm from Case for 10 C Seconds (Plastic DIP or SOIC Package) * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/C from 65 to 125C SOIC Package: : - 7 mW/C from 65 to 125C RECOMMENDED OPERATING CONDITIONS Symbol Parameter VCC DC Supply Voltage (Referenced to GND) VIN, VOUT DC Input Voltage, Output Voltage (Referenced to GND) TA Operating Temperature, All Package Types t r, tf Input Rise and Fall Time (Figure 1) Min 4.5 0 -55 0 Max 5.5 VCC +125 500 Unit V V C ns This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND(VIN or VOUT)VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. 2 IN74HCT20 DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND) Guaranteed Limit VCC Symbol Parameter Test Conditions V 25 C 85 125 to C C -55C VIH Minimum High- VOUT=0.1 V or VCC-0.1 V 4.5 2.0 2.0 2.0 Level Input IOUT 20 A 5.5 2.0 2.0 2.0 Voltage VIL Maximum Low - VOUT=0.1 V or VCC-0.1 V 4.5 0.8 0.8 0.8 Level Input IOUT 20 A 5.5 0.8 0.8 0.8 Voltage VOH Minimum High- VIN= VIH or VIL 4.5 4.4 4.4 4.4 Level Output IOUT 20 A 5.5 5.4 5.4 5.4 Voltage VIN= VIH or VIL 4.5 3.98 3.84 3.7 IOUT 4.0 mA VOL Maximum Low- VIN=VIH 4.5 0.1 0.1 0.1 Level Output IOUT 20 A 5.5 0.1 0.1 0.1 Voltage VIN=VIH 4.5 0.26 0.33 0.4 IOUT 4.0 mA IIN Maximum Input VIN=VCC or GND 5.5 0.1 1.0 1.0 Leakage Current VIN=VCC ICC Maximum or GND 5.5 2.0 20 40 Quiescent Supply IOUT=0A Current (per Package) VIN=2.4 V,Any One Quiescent -55 25 C to ICC Additional Supply Input C 125C VIN=VCC or GND, Other Current Inputs 5.5 2.9 2.4 IOUT=0A Unit V V V V A A mA 3 IN74HCT20 AC ELECTRICAL CHARACTERISTICS(VCC =5.0 V 10%,CL=50pF,Input tr=tf=6.0 ns) Guaranteed Limit Symbol Parameter 25 C 85C 125 Unit C to -55C tPLH, Maximum Propagation Delay, Input A 28 35 42 ns tPHL ,B,C or D to Output Y (Figures 1 and 2) tTLH, tTHL Maximum Output Transition Time, Any 15 19 22 ns Output (Figures 1 and 2) CIN Maximum Input Capacitance 10 10 10 pF Power Dissipation Capacitance (Per Gate) Used to determine the no-load dynamic power consumption: PD=CPDVCC2f+ICCVCC Typical @25C,VCC=5.0 V 29 CPD pF Figure 1. Switching Waveforms Figure 2. Test Circuit EXPANDED LOGIC DIAGRAM (1/2 of the Device) 4 |
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